Wafer carrier with a multi-pocket configuration



FIG. 1 is a perspective view of a wafer carrier with a multi-pocket configuration according to the new design.

FIG. 2 is a top plan view of the wafer carrier with a multi-pocket configuration shown in FIG. 1.

FIG. 3 is a detail view of a portion of the wafer carrier with a multi-pocket configuration shown in FIG. 1 detailing an enlarged portion corresponding to the area indicated in FIG. 1 that includes a single pocket and surrounding region in a perspective view.

FIG. 4 is a right side view of a wafer carrier with a multi-pocket configuration according to the new design shown in FIG. 1, with the left side, front, and rear views being the same as the right side view; and,

FIG. 5 is a bottom plan view of a wafer carrier with a multi-pocket configuration according to the new design shown in FIG. 1.

The broken lines, where present, in FIGS. 1, 3, 4 & 5 illustrate portions of the wafer carrier with a multi-pocket configuration that represent environment of the claimed design and form no part of the claimed design. The dash-dot lines of FIG. 1 define the area corresponding to the enlarged portion shown in FIG. 3 and form no part of the claimed design. The dash-dot and broken lines in FIG. 3 represent the edge of the enlarged portion of the design and form no part of the claimed design. 

CLAIM We claim the ornamental design for a wafer carrier with a multi-pocket configuration, as shown and described. 